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Vision Chip 3: High Resolution Imager

Introduction
This project aims to create a high resolution imager using our custom pixel design. Our pixel continues the tradition of eliminating transistors from the pixel. It also uses capacitive coupling for read-out, but it requires only a single contact. The impact on size resulting from the lower contact count is almost 20% reduction. More importantly, the fill factor increases drastically. (Polysilicon is virtually transparent to visible light; only areas with metalization block light.) This paper describes the structure of our pixel and presents data from a prototype array fabricated in a 1.2mm Nwell BiCMOS process. The base layer in this process is required for our pixel. The pixel’s size is 8.4mm x 8.4mm, and it has the potential to be the smallest APS in the literature when implemented in a 0.6mm process

Results


Raw image (no correlated double
sampling) by 86 x 76 array