Single Chip Stereo Imager
Note: This page describes the first generation SSI (SSI-1).
The newer SSI2 is described in this presentation
(Acrobat version 6)
The Single-chip Stereo Imager (SSI) is an integrated circuit for stereo vision. It incorporates two 128x128 pixel current-mode imagers and current-mode analog computation circuitry on a single integrated circuit. The SSI is based on an algorithm designed for operation in current-mode analog VLSI . The only computational blocks used are addition, subtraction, rectification (absolute value), and loser-take-all (finding the minimum). The combination of two imagers and disparity computation circuitry on a single chip eliminates the need for separate imagers, analog-to-digital converters, and power-hungry DSPs or MPUs. Potential applications of the SSI include obstacle detection for autonomous robots, computer user-interface devices, and vehicle navigation.
A modified version of block matching is used to find the stereo disparity at each location in the field of view. At each (x,y) location, the sum-of-absolute-difference (SAD) is computed, in parallel, for each possible disparity. A loser-take-all (LTA) finds the disparity with the lowest SAD. The SSI is capable of operation at 66.1 million checked disparities per second (41fps) while drawing 12.7mA from a 5V supply, including imagers and computation circuits. The SSI occupies 4.23x4.23mm2 of area in a 0.5um 5V, 3m2p CMOS process.
The SSI2, a second version of the SSI, has been submitted (October 2003) for fabrication. The SSI2 was designed to address the shortcomings of the original SSI, including high imager fixed-pattern noise (FPN) and matching in the SAD computation circuits. The SSI2 occupies 12mm2 of area in a 0.35um 3.3V 4m1p CMOS process. Fabrication of the SSI2 was provided by MOSIS.
|Block diagram of the
A micrograph of the SSI is
shown below. The two imagers and the sum-of-absolute-difference (SAD)
and loser-take-all (LTA) computation circuits are highlighted. The
total chip area, including pads, is 18mm2.
of the SSI
|Left and right images and computed disparity (from right
to left image).
-  R.M. Philipp and R. Etienne-Cummings,
Stereo Imager," accepted (March 2003) for publication in Analog Integrated Circuits and Signal
-  R.M. Philipp and R. Etienne-Cummings, "Single chip stereo imager," ISCAS 2003, v.4, pp. 808-811, 2003.
-  R.M. Philipp, V. Reddy, R. Etienne-Cummings, and M.A. Lewis, "Architecture for an aVLSI stereo vision system," ISCAS 2002, v.3, pp. 691-694, 2002.