

The Johns Hopkins University, Baltimore, Maryland
Cadence®
University Program Member
Welcome to the home page of the Cadence Users Group at Johns
Hopkins University. This page contains information about the Cadence
design tools extensively used in classes and research programs in the
Electrical and Computer Engineering Department at Hopkins. Students
obtain practical experience in advanced electronics design using state-of-the-art
CAD tools, computing and laboratory
facilities, and access to the MOSIS
foundry for prototyping of integrated circuits.
- JHU Cadence Wiki:
- http://etienne.ece.jhu.edu/cadencewiki - Wiki for documenting the use and administration of Cadence at JHU
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Value Added Items:
-
(March 17, 2008)
NSCU HTML Tutorial Updated Tutorial using NSCU Toolkit.
-
(March. 5, 2007)
Cadence Environment Package v1.9b
- Config files, directories, simulation files.
Read this for more info.
See the file manifest
for a list of included files. Untar this into your home directory.
-
(Mar. 16, 2004)
mosiscrc (for linux Redhat 9)
- mosiscrc generates the checksum numbers necessary to submit a
layout file to MOSIS.
-
(Nov. 19, 2003)
Matt Clapp's mosisLib
- Cadence library for doing lambda-based designs.
Read this for more info.
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(Mar. 7, 2007) HTML Tutorial
for Composer, Diva, LVS, Verilog, Analog Artist
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(Sep. 27, 2003) Technology files
for MOSIS SCMOS processes (May be out of date!)
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(Feb. 23, 1999) MOSIS 1.2u
Padframes
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Submit program
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A few Cadence
tips
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Spice
Guide
Students of classes 520.491 and 520.492, please DO NOT
print the manuals. Try to use the online manuals as far as possible
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Research Projects:
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Computational
Sensory-Motor System Lab has the following projects using Cadence design
tools:
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The development and implementation of VLSI algorithms for image acquisition,
edge detection and motion detection.
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Applications of these algorithms to specific tasks such as visual velocity
measurement, autonomous target acquisition and tracking and rudimentary
line-following auto-navigation.
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Development of a general purpose (> 128 x 128 pixel) computational sensor
for image acquisition, edge detection and 2D motion detection
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Incorporation of the general purpose computational sensors with digital
and neural computers to address problems in real-time dynamic scene analysis,
dynamic target segmentation and recognition, multiple target tracking and
fully autonomous navigation in cluttered environments.
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Adaptive Microsystems Lab has the
following ongoing research projects using Cadence design tools:
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Development of analog VLSI systems for multimedia sensory integration,
covering applications of speech processing, visual motion estimation, and
communications.
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Support vector "machines" for adaptive classification and function approximation.
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Development of low-power mixed analog-digital VLSI implementation of a
hybrid ANN/HMM (artificial neural network/hidden markov model) system for
continuous speech recognition.
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Design and VLSI prototyping of high-speed oversampling and pipelined analog-to-digital
converters in CMOS, BiCMOS and SiGe technology.
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A project to interface analog VLSI electronics with optical diffraction
systems for on-line correction of abberation of optical propagation in
atmospheric media.
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Classes:
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520.492: Mixed Signal VLSI (Prof. Gert
Cauwenberghs)
Silicon models of information and signal processing functions, implemented
in analog and digital CMOS integrated circuits. Structured design, scalability,
parallelism, low-power consumption, and robustness to process variations.
Topics include digital-to-analog and analog-to-digital data conversion,
delta-sigma modulation, vector quantization, continuous-time and switched-capacitor
analog filters, and adaptive neural computation.
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520.491: CAD Design
of Digital VLSI Systems I (Prof. Ralph
Etienne-Cummings)
This course is an introduction to VLSI design. Although the emphasis
is on digital VLSI circuits, an initial overview of the analog basis of
digital VLSI circuits will be given. Using a state-of-the-art CAD environment
provided by CADENCE Design Systems, the students will design combinational
and sequential circuits at various levels of abstraction.
Both classes feature advanced design projects using the Cadence tools,
and student chip designs are fabricated through the MOSIS
foundry service with support from the MOSIS Educational Program (MEP).
"Information is provided "as is" without warranty or guarantee of
any kind. No statement is made and no attempt has been made to examine
the information, either with respect to operability, origin, authorship,
or otherwise.
Any attempt to use this information is at your own risk---we recommend
using it on a copy of your data to be sure you understand what it does
and under what conditions. Keep your master intact until you are personally
satisfied with the use of this information within your environment."
Cadence® is a trademark of
Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134
Ndubuisi Ekekwe, n e k e k w e 1 at j h u d o t e d u
Andre Harrison, a h a r r i 6 8 at j h u d o t e d u
Mike Chi, y c h i 2 at j h u d o t e d u
Matt Clapp, m c l a p p at j h u dot e d u
Viktor Gruev, v g r u e v at e c e dot j h u dot e d u
Ralf Philipp, r p h i l i p p at j h u dot e d u
Last modified: March 13, 2008